This invention relates generally to processing within a computing environment, and more particularly to power management in a multi-processor computer system.
Overall computer system performance is affected by each of the key elements of the computer structure, including the performance/structure of the processor(s), any memory cache(s), the input/output (I/O) subsystem(s), the efficiency of the memory control function(s), the main memory device(s), and the type and structure of the interconnect interface(s).
Extensive research and development efforts are invested by the industry, on an ongoing basis, to create improved and/or innovative solutions to maximize overall computer system performance and density by improving the system/subsystem design and/or structure. High-availability systems present further challenges as related to overall system reliability due to customer expectations that new computer systems will markedly surpass existing systems in regard to mean-time-between-failure (MTBF), in addition to offering additional functions, increased performance, increased storage, lower operating costs, etc. Other frequent customer requirements further exacerbate the computer system design challenges, and include such items as ease of upgrade and reduced system environmental impact (such as space, power, and cooling).
As the performance of processors continues to increase, the amount of power consumed by the processors is also likely to continue to increase. The amount of power that can be consumed by a given processor is often limited by a variety of factors such as the operating environment of the processor. Thus, improvements in processor performance may be gated by the additional power required by the processor to implement the improvements.